In power solutions of high performance CPU, switching converters with lower output voltage and higher output current are required. Multi-phase switching converters are widely used in these applications because of its good performance.
FIG. 1 is a block diagram of a prior multi-phase switching converter 100. The multi-phase switching converter 100 comprises N switching circuits 101_1˜101_N, wherein N is an integer larger than or equal to 2. The input terminals of the N switching circuits are configured to receive an input voltage VIN, the output terminals of the N switching circuits are coupled together to provide an output voltage VOUT to a load. The controller comprises a first comparing circuit 102 and a control circuit 103. The first comparing circuit 102 compares the output voltage VOUT with a reference signal VREF to generate a comparison signal CMPO. The control circuit 103 generates control signals CTRL1˜CTRLN based on the comparison signal CMPO to control the ON and OFF switching of the N switching circuits. Generally, when the comparison signal CMPO is logical high which indicates the output voltage VOUT is smaller than the reference signal VREF, the control circuit turns on the corresponding switching circuit to provide energy to the load. The switching circuit is turned off by the control circuit when its on-time reaches a predetermined time threshold.
In normal operation, the multi-phase switching converter 100 operates in an interleave mode and the switching circuits 101_1˜101_N are turned on successively. When a load current increase is detected, the multi-phase switching converter 100 enters into an overlap mode. The switching circuits 101_1˜101_N are turned on simultaneously to provide more current to the load. After the overlap mode, the interleave mode is resumed and the switching circuits 101_1˜101_N are turned on successively from the first switching circuit.
FIG. 2 is a working waveform of a prior 4-phase switching converter. When a load current increase is detected, the 4-phase switching converter enters into the overlap mode and all the switching circuits are turned on simultaneously. As shown in the figure, the phase current (output current) i1 of the first switching circuit is the highest before the overlap happens. Since the first switching circuit is turned on again after the overlap mode, the phase current i1 keeps increasing and the phase current will be imbalanced among the switching circuits.